Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
1999-01-12
2002-04-09
Lee, Eddie (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S787000, C257S738000
Reexamination Certificate
active
06369449
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to an improved method for encapsulating and reinforcing the electrical interconnections between an integrated circuit chip and a substrate. It also relates to an integrated circuit chip assembly produced by said method.
An integrated circuit chip assembly generally comprises an integrated circuit chip attached to a substrate, typically a chip carrier or a circuit board. The most commonly used integrated circuit chip is composed primarily of silicon having a coefficient of thermal expansion of about 2 to 4 ppm/°C. The chip carrier or circuit board is typically composed of either a ceramic material having a coefficient of thermal expansion of about 6 ppm/°C., or an organic material, possibly reinforced with organic or inorganic particles or fibers, having a coefficient of thermal expansion in the range of about 6 to 50 ppm/°C. One technique well known in the art for interconnecting integrated circuit chips and substrates is flip chip bonding. In flip chip bonding, a pattern of solder balls is formed on the active surface of the integrated circuit chip, allowing complete or partial population of the active surface with interconnection sites. The solder balls which typically have a diameter of about 0.002 to 0.006 inches, are deposited on solder wettable terminals on the active surface of the integrated circuit chip forming a pattern. A matching footprint of solder wettable terminals is provided on the substrate. The integrated circuit chip is placed in alignment with the substrate and the chip to substrate connections are formed by reflowing the solder balls. Flip chip bonding can be used to attach integrated circuit chips to chip carriers or directly to printed circuit boards.
During operation of an integrated circuit chip assembly, cyclic temperature excursions cause the substrate and the integrated circuit chip to expand and contract. Since the substrate and the integrated circuit chip have different coefficients of thermal expansion, they expand and contract at different rates causing the solder ball connections to weaken or even crack as a result of fatigue. To remedy this situation, it is common industry practice to reinforce the solder ball connections with a thermally curable polymer material known in the art as an underfill encapsulant. Underfill encapsulants are typically filled with ceramic particles to control their rheology in the uncured state and to improve their thermal and mechanical properties in the cured state.
Underfill encapsulants have been widely used to improve the fatigue life of integrated circuit chip assemblies consisting of an integrated circuit chip of the flip chip variety attached to a substrate made of alumina ceramic material having a coefficient of thermal expansion of about 6 ppm/°C. More recently, integrated circuit assemblies having an integrated circuit chip of the flip chip type attached to a substrate made of a reinforced organic material with a composite coefficient of thermal expansion of about 20 ppm/°C. have been manufactured.
At the first level of packaging, the underfill encapsulation process is typically accomplished by dispensing the liquid encapsulant at one or more points along the periphery of the integrated circuit chip. The encapsulant is drawn into the gap between the integrated circuit chip and the substrate by capillary forces, substantially filling the gap and forming a fillet around the perimeter of the integrated circuit chip. The diameter of the filler particles in the encapsulant are sized to be smaller than the height of the gap so as not to restrict flow. Typical encapsulant formulations have a viscosity of about 10 Pa-s at the dispense temperature. After the encapsulant has flowed into the gap, it is cured in an oven at an elevated temperature.
Cured encapsulants typically have coefficients of thermal expansion in the range of about 20 to 40 ppm/°C., and a Young's Modulus of about 1 to 3 GPa, depending on the filler content and the polymer chemistry. It may be desirable in some cases to further alter the cured properties of the encapsulant, however, the requirement that the encapsulant have low viscosity in the uncured state severely restricts the formulation options. For example, the addition of more ceramic filler would lower the resulting coefficient of thermal expansion, but increase the uncured viscosity.
At the second level of packaging, encapsulating materials can be used to reinforce the interconnections between a circuit board and an integrated circuit chip assembly comprised of an integrated circuit chip attached to a chip carrier. In this type of assembly the solder balls typically have a diameter in the range of about 0.020 to 0.030 inches. Several methodologies are known for reinforcing and encapsulating this type of interconnection. However, the various methods used for reinforcing and encapsulating interconnections at the second level are not extendable to first level packaging because of the differences in flow regimes resulting from the different gap heights. In the case of a flip chip package with a gap of 0.002 to 0.006 inches, the flow characteristics of the underfill encapsulant are governed by viscous forces and capillary forces; viscous forces resisting flow and capillary forces driving flow. Suitable materials for first level underfill encapsulation are highly engineered to exhibit tightly controlled viscosity levels and specific wetting characteristics. In the case of a second level encapsulation, where the gap is about 0.020 to 0.030 inches in height, conventional first level underfill encapsulants would flow indiscriminately across the surface of the printed circuit board unless some external barrier prevents such flow.
Known in the art is a method for encapsulation of a flip chip package wherein a package body is formed around the perimeter of the flip chip in a two step process. First the integrated circuit chip is underfilled as previously described for first level packaging, and then a package body is formed around the perimeter of the integrated circuit chip using a molding process. In yet another known method, additional reinforcement is achieved by encapsulating both faces of the flip chip and its perimeter in a single step. In this technique, the gap between the integrated circuit chip and the substrate has been substantially eliminated by forming a large hole in the substrate that comprises at least 50% of the active area of the integrated circuit chip. This approach essentially eliminates the small gap typical of a conventional integrated circuit chip to substrate interconnection, but has the drawback of limiting the active area of the integrated circuit chip that can be used for forming interconnections because only the perimeter of the integrated circuit chip can be used.
Notwithstanding the use of underfill encapsulation, fatigue life of an integrated circuit chip assembly is shorter when the solder interconnections are made to organic substrates as opposed to ceramic substrates, owing to the greater mismatch in thermal expansion. Together with the limitations imposed on formulation options by the low viscosity requirement, improvement in the mechanical reinforcement of integrated circuit chip interconnections is still required.
It is the object of the present invention to provide an improved method for underfilling and for encapsulating flip chip packages. It is also the object of this invention to permit the use of more viscous materials as underfill materials. It is the further object to provide a method which permits increased speed for the encapsulation process and allows the encapsulation process, both underfilling and overmolding, to be completed in a single step using a single encapsulant material.
SUMMARY OF THE INVENTION
This invention provides an improved method for encapsulating the solder ball interconnections of an integrated circuit chip assembly which accommodates the use of high viscosity encapsulating materials and eliminates the need for a dam to contain flow. In accordance with the preferred embodime
Farquhar Donald Seton
Klodowski Michael Joseph
Papathomas Kostantinos
Wilcox James Robert
Cruz Lourdes
Hogg William N.
International Business Machines - Corporation
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