Method and apparatus for improved MOS gating to reduce...

Details Method and apparatus for improved MOS gating to reduce... Method and apparatus for improved MOS gating to reduce...

2005-03-22

2005-03-22

Clark, Jasmine (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S331000, C257SE21419, C257SE23019

Reexamination Certificate

active

06870220

ABSTRACT:
A gate structure for a semiconductor device includes a shielding electrode and a switching electrode. Respective portions of the shielding electrode are disposed above said drain region and said well region. A first dielectric layer is disposed between the shielding electrode and the drain and well regions. The switching electrode includes respective portions that are disposed above said well region and said source region. A second dielectric layer is disposed between the switching electrode and the well and source regions. A third dielectric layer is disposed between the shielding electrode and the switching electrode.

REFERENCES:
patent: 4941026 (1990-07-01), Temple
patent: 6426175 (2002-07-01), Furukawa et al.
patent: 6521923 (2003-02-01), D'Anna et al.
patent: 6690062 (2004-02-01), Henninger et al.

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