Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
Reexamination Certificate
2005-12-27
2005-12-27
Du, Thuan (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
Using delay
C713S400000
Reexamination Certificate
active
06981165
ABSTRACT:
A method and apparatus for handling an interrupt from a real-time clock to increment a program clock in a computer system while compensating for missed interrupts due to contention on a system bus from a DMA controller or the like. In accordance with the invention, a count is stored representing a cumulative interval of time that has elapsed without a corresponding incrementing of the program clock. In response to an interrupt from the real-time clock, the processor transfers control to an interrupt handling routine, which determines the interval of time that has elapsed since the previous real-time clock interrupt and increments the cumulative interval of time by the actual interval of time that has elapsed since the previous real-time clock interrupt. If the cumulative interval of time is greater than an expected interval of time between real-time clock interrupts, the interrupt handling routine iteratively increments the program clock and decrements the cumulative interval of time to reflect incrementing of the program clock until the cumulative interval of time is less than the expected interval of time between real-time clock interrupts.
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Du Thuan
Kinnaman, Jr. William A.
Patel Anand B.
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