Method and apparatus for generating self-verifying device...

Details Method and apparatus for generating self-verifying device... Method and apparatus for generating self-verifying device...

2011-06-07

2011-06-07

Kerveros, James C (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07958422

ABSTRACT:
Methods and systems for generating code for a device are disclosed. A device command for which the code is to be generated is selected. Response template parameters for the selected device commands are retrieved from a response template associated with the device command. Command syntax for the selected device commands are retrieved from a device library associated with the device command. The code is generated for the device in a high level language and the response template parameters are incorporated to provide verification of the device response when the test code is executed.

REFERENCES:
patent: 6047393 (2000-04-01), Yamada
patent: 7139955 (2006-11-01), Rohrbaugh et al.
patent: 7257754 (2007-08-01), Chae et al.
patent: 7284177 (2007-10-01), Hollander et al.
patent: 7302623 (2007-11-01), Kang

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