Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-11-07
2006-11-07
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S216000, C438S287000, C257SE29309, C257SE21180, C257SE21679
Reexamination Certificate
active
07132336
ABSTRACT:
An improved semiconductor memory structure and methods for its fabrication are disclosed. The memory structure includes a semiconductor substrate having a dielectric region formed over a channel region. A doped region is formed between a top portion and a bottom portion of the dielectric region. This doped region includes a suitable electron affinity material. A gate electrode is connected with the top of the dielectric region. In some embodiments, suitable electron affinity materials are introduced into the doped region using implantation techniques. In another embodiment, the electron affinity material is introduced into the doped region using plasma treatment of the dielectric region and the redeposition of additional dielectric material on top of the dielectric region and doped region.
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Aronowitz Sheldon
Sun Grace S.
Zubkov Vladimir
Beyer Weaver & Thomas
Fourson George
LSI Logic Corporation
Maldonado Julio J.
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