Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2007-05-01
2007-05-01
Bragdon, Reginald (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C710S244000, C711S158000, C711S108000
Reexamination Certificate
active
10789667
ABSTRACT:
A precedence determination system including a first type memory bank configured to receive a first search signal and to provide first search result indications, a second type memory bank configured to receive a second search signal and to provide second search result indications, a precedence number table coupled to the first and second type memory banks and configured to provide programmable precedence numbers, and a precedence determination circuit coupled to the first and second type memory banks and the precedence number table and configured to provide a third search result indication is disclosed. In one embodiment, the first type memory bank can be a static random access memory (SRAM) and the second type memory bank can be a ternary content addressable memory (TCAM).
REFERENCES:
patent: 6987683 (2006-01-01), Ao
Agarwal Puneet
Gruner Frederick R.
Kao Sophia W.
Bragdon Reginald
Namazi Mehdi
Raza Microelectronics Inc.
Stevens Law Group
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