Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
2002-05-01
2004-10-26
Norton, Nadine (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S694000, C438S697000, C438S699000, C156S345120, C156S345130
Reexamination Certificate
active
06809032
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention generally pertains to semiconductor processing, and, more particularly, to polishing process layers formed above a semiconducting substrate.
2. Description of the Related Art
The manufacture of semiconductor devices generally involves the formation of various process layers, selective removal or patterning of portions of those layers, and deposition of additional process layers above the surface of a semiconducting substrate. The substrate and the deposited layers are collectively called a “wafer.” This process continues until a semiconductor device is completely constructed. The process layers may include, by way of example, insulation layers, gate oxide layers, conductive layers, and layers of metal or glass, etc. It is generally desirable in certain steps of the wafer fabrication process that the uppermost surface of the process layers be approximately planar, i.e., flat, for the deposition of subsequent layers. The operation used to produce a flat, uppermost surface on a wafer is called “planarization.”
One planarization operation is known as “chemical-mechanical polishing,” or “CMP.”In a CMP operation, an upper surface of a process layer is polished to planarize the wafer for subsequent processing steps. Both insulative and conductive layers may be polished, depending on the particular step in the manufacture. For instance, a layer of insulating material may be formed above the wafer, and a plurality of openings may be formed therein. Then, a metal layer may be deposited above the insulating layer and in the openings formed therein. Next, the metal layer may be polished with a CMP tool to remove a portion of the metal layer above the insulating layer to form conductor interconnects, such as lines and plugs, in the openings in the insulating layer. The CMP tool removes the metal process layer using an abrasive/chemical action created by a chemically active slurry and a polishing pad. A typical objective is to remove the metal process layer down to the upper surface of the insulative layer, but this is not always the case.
The point at which the excess conductive material is removed, and the embedded interconnects remain, is called the “endpoint” of the CMP operation. The CMP operation should result in an approximately planar surface with little or no detectable scratches or excess material present on the surface of the polished layer. In practice, the wafer, including the deposited, planarized process layers, are polished beyond the endpoint (i.e., “overpolished”) to ensure that all excess conductive material has been removed. Excessive overpolishing increases the chances of damaging the surface of the polished layer, uses more of the consumable slurry and pad than may be necessary, and reduces the production rate of the CMP equipment. The window for the polish time endpoint can be small, e.g., on the order of seconds. Also, variations in material thickness may cause the endpoint to change. Thus, accurate in-situ endpoint detection is highly desirable.
One technique for endpoint detection involves optical reflection. Optical reflection techniques generally involve exposing the surface of the wafer to a laser light source and measuring the amount of light reflected therefrom. Generally, as a highly reflective layer, such as copper, is polished away, the underlying layer, such as a dielectric, is exposed. To the extent that the underlying layer has a different, e.g., lower, reflectivity, the amount of light reflected may change substantially as it is exposed. The variation in the reflectivity may be detected and used as an indication that the endpoint has been reached.
There are at least two significant shortcomings in optical reflection techniques. First, where the underlying layer has a reflectivity similar to that of the copper layer, the change in reflectivity may not be sufficient to trigger the endpoint detection. This is particularly true where the reflectivity is measured in situ where the “noisy” manufacturing environment may mask a small change in reflectivity.
A second problem with optical reflection techniques may arise when the coverage of the copper layer is high. That is, where the copper covers a substantial portion of the surface of the wafer (e.g., approximately 90%), even at the endpoint, the change in reflectivity may be small because of the relatively small portion of the underlying surface that will be exposed at the endpoint. This problem is exacerbated where the underlying layer has a reflectivity that is not substantially different from that of the copper layer.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
SUMMARY OF THE INVENTION
In one aspect of the present invention, a method for detecting an endpoint in a polishing process is provided. The method comprises polishing a surface of a semiconductor device, wherein the semiconductor device includes a first layer comprised of a first material and a second layer comprised of a second material. The first layer is positioned above the second layer. The material used to form the second layer is determined. Light of a first preselected frequency is delivered toward the surface of the semiconductor device, wherein the first preselected frequency is selected in response to the type of material used to form the second layer. The light reflected from the surface of the semiconductor device is detected, and compared to a preselected setpoint. The polishing process is modfied in response to the reflected light exceeding the preselected setpoint.
In another aspect of the present invention, a system for detecting an endpoint in a polishing process is provided. The system comprises a polishing tool, a controllable light source, a sensor, and a controller. The polishing tool is capable of polishing a surface of a semiconductor device, wherein the semiconductor device includes a first layer comprised of a first material and a second layer comprised of a second material. The first layer is positioned above the second layer. The controllable light source is capable of delivering light having one of a plurality of a preselected frequencies to the surface of the semiconductor device. The sensor is capable of detecting the light reflected from the surface of the semiconductor device. The controller is capable of determining the second material, instructing the controllable light source to deliver light of one of the frequencies in response to the second material, comparing the reflected light to a preselected setpoint, and modifying the polishing process in response to the reflected light exceeding the preselected setpoint.
REFERENCES:
patent: 6028669 (2000-02-01), Tzeng
patent: 6214734 (2001-04-01), Bothra et al.
patent: 6429130 (2002-08-01), Chuang
Beckage Peter J.
Besser Paul R.
Brennan William S.
Hause Frederick N.
Iacoponi John A.
Norton Nadine
Tran Binh X.
Williams Morgan & Amerson
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