Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2006-06-06
2006-06-06
Verbrugge, Kevin (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C714S764000, C714S006130, C714S006130, C714S042000, C714S049000
Reexamination Certificate
active
07058782
ABSTRACT:
A method and apparatus for coordinating dynamic memory page deallocation with a redundant bit line steering mechanism are provided. With the method and apparatus, memory scrubbing and redundant bit line steering operations are performed in parallel with handling of notifications of runtime correctable errors. When a correctable error is encountered during runtime, and the correctable error is determined to be persistent, then dynamic memory page deallocation is requested of a hypervisor. The determination of persistence is based on a history CE table that is populated by the operation of the memory scrubbing and redundant bit line steering mechanism of a service processor. Thus, only those correctable errors that persist for longer than one memory scrubbing cycle are subject to memory page deallocation.
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Henderson Daniel James
Kitamorn Alongkorn
Lemmon Wayne L.
Nayar Naresh
Shankar Ravi A.
Fay III Theodore D.
Gu Shawn
International Business Machines - Corporation
McBurney Mark E.
Verbrugge Kevin
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