Static information storage and retrieval – Read/write circuit – Erase
Reexamination Certificate
2008-05-13
2008-05-13
Luu, Pho M. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Erase
C365S156000, C365S157000, C365S226000, C365S227000
Reexamination Certificate
active
07372754
ABSTRACT:
A nonvolatile memory device includes a nonvolatile memory cell array including a plurality of nonvolatile memory cells connected to a plurality of word lines, a word line voltage generator configured to generate first and second sequences of voltage pulses. The device selectively supplies one of the first and second sequences of voltage pulses to a selected one of the word lines to program the nonvolatile memory cells connected to the selected word line. A slope of at least one voltage pulse of the first sequence of voltage pulses is greater than a slope of at least one voltage pulse of the second sequence of voltage pulses. In general, the first sequence is applied to word lines far away from the string select line (SSL), and the second sequence is applied to word lines that are close to the SSL.
REFERENCES:
patent: 5761151 (1998-06-01), Hatakeyama
patent: 6108235 (2000-08-01), Honma et al.
patent: 6804150 (2004-10-01), Park et al.
patent: 2001-229681 (2001-08-01), None
patent: 2004-158074 (2004-06-01), None
patent: 1020030021647 (2003-03-01), None
Hwang Sang-Won
Lee Jin-Wook
Luu Pho M.
Samsung Electronics Co,. Ltd.
Volentine & Whitt PLLC
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