Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-06-25
2010-06-01
Ellis, Kevin L (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S718000
Reexamination Certificate
active
07730375
ABSTRACT:
A method and apparatus allows externally selecting a functional operation mode or one of a plurality of test operation modes of an electronic device, and in particular a volatile or non-volatile memory device, without the need for additional device connections. One variation of the method and apparatus allows unlimited switching between modes. Another variation of the method and apparatus limits test operation mode selection except at the time of powering up of the device. In either variation, mode selection is based on internally detected stimulus externally applied to the device that would not be present during normal functional operation of the device. Operation of the present invention is essentially transparent in applications where test operations are not utilized, making a device incorporating the present invention compatible with previous versions of the device where the present invention and test operation modes, such as IEEE P1581 and BIST, were not included.
REFERENCES:
patent: 4488111 (1984-12-01), Widdowson
patent: 6128758 (2000-10-01), Hall et al.
patent: 2006/0242499 (2006-10-01), Volz
Ellis Kevin L
Gandhi Dipakkumar
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