Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2007-01-02
2007-01-02
Cao, Chun (Department: 2115)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S600000
Reexamination Certificate
active
10756025
ABSTRACT:
In some embodiments, a method and apparatus for a multi-mode I/O interface are described. In one embodiment, the interface includes a transmit state machine that generates a state signal indicating a state of the I/O interface in a next clock cycle. A pattern generator includes pattern generation units that select, in response to the state signal and an I/O protocol signal, N-bit interface control patterns from a plurality of microcode N-bit interface control patterns contained in the pattern generation units. A serialization unit then serializes the selected N-bit interface control patterns. A synchronization unit synchronizes the control patterns into a control clock domain to form interface control signals that are transmitted to data buffers and strobe buffers to enable transmission and receipt of data in accordance with an I/O protocol indicated by the I/O protocol signal. Other embodiments are described and claimed.
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Blakely , Sokoloff, Taylor & Zafman LLP
Cao Chun
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