Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-11-13
2007-11-13
Whitmore, Stacy A. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
11157025
ABSTRACT:
A method of generating a parameterized cell is disclosed herein. The method comprises performing a compiling interpretation on a structure layout. The compiling interpretation includes i) determining and analyzing shape relationships of the structure layout, and ii) mapping shapes and calculating properties of mapped shapes. The method also includes generating code in response to the compiling interpretation, wherein the generated code is representative of one or more parameterized cells of a pcell library of an electronic design automation software program.
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Kasel Leo
Perez Julia
Balconi-Lamica Michael J.
Dimyan Magid Y.
Freescale Semiconductor Inc.
Whitmore Stacy A.
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