Cleaning and liquid contact with solids – Processes – For metallic – siliceous – or calcareous basework – including...
Reexamination Certificate
1999-12-16
2002-05-28
Carrillo, Sharidan (Department: 1746)
Cleaning and liquid contact with solids
Processes
For metallic, siliceous, or calcareous basework, including...
C134S022100, C134S022190, C134S026000, C134S034000, C134S036000, C134S042000, C134S182000, C134S186000, C134S902000, C438S106000, C438S115000, C438S108000, C438S906000, C257S678000, C257S687000
Reexamination Certificate
active
06395097
ABSTRACT:
TECHNICAL FIELD
The present invention relates to methodologies and devices used for cleaning electronic semiconductor packages or assemblies incorporating flip-chip semiconductor devices. In particular, the invention contemplates methodologies for cleaning the underfill space between a semiconductor die and a packaging substrate in a flip-chip assembly.
BACKGROUND OF THE INVENTION
A flip-chip semiconductor device is one in which a semiconductor chip (die) is directly mounted onto a packaging substrate. Conductive terminals on an electrically active surface of the semiconductor die, usually in the form of conductive solder bumps, are directly contacted to the wiring patterns on the packaging substrate without the use of wire bonds, tape-automated bonding (TAB), or other like methods. Because the conductive bumps making the connections to the packaging substrate are on the active surface of the die or chip, the die is mounted in a face-down manner, thus the name flip-chip. Flip-chip semiconductor devices permit higher component density and faster access times than conventionally packaged semiconductor devices. These advantages have led to increased usage of such flip-chip devices in the electronic industry.
One problem in flip-chip mounting is that under normal operating conditions, the conductive bumps which couple the die to the packaging substrate are subjected to significant stress. This stress leads to thermal fatigue in the bumps and at the interfaces where the bumps contact the conductive bonding pads of a packaging substrate. This stress frequently leads to connection failures. Presently, the region between the die and the packaging substrate (referred to herein as the underfill space) is filled with an encapsulation or underfill material (typically, such materials are epoxies) to form an underfill layer. This reduces the stresses on the bumps making for more reliable semiconductor packages.
In order to effectively fill the underfill space between the die and the packaging substrate with encapsulation materials, it is important that the underfill space be well cleaned. Left over flux from the reflow processes that bond the conductive bumps of the die to the bonding pads of the substrate must be removed, as must other residues. Moreover, the cleaning solvents used in flux removal processes must also be removed. Residue or remaining flux leads to delamination problems in the underfill layer after the underfill space is filled. Thus, cleaning occupies a critical role in semiconductor device manufacture.
Conventional cleaning processes remove flux by immersing an assembled die and packaging substrate (referred to hereinafter as the die/substrate assembly) in a bath of appropriate solvent, for example, turpentine based solutions such as EC-7R from Petroform. Typically, the assembly is then agitated in the solvent bath. The solvent propagates into the underfill space by capillary action. This cleans away flux and other debris. While such processes are suitable for their intended purposes, advances in connection technology have made apparent some of the limitations of current cleaning methodologies. Moreover, as the size of semiconductor dies increase and the space between the die and the packaging substrate decreases, capillary action and agitation, as a means of propagating solvent throughout the underfill space during cleaning, becomes inadequate making the cleaning process more difficult.
As techniques for interconnecting the die to the packaging substrate improve, the space between the die and packaging substrate is reduced. Distances as small as 25 microns between the die and packaging substrate can comfortably be achieved with still smaller dimensions being attainable in the near future. Additionally, semiconductor die size is increasing, with die sizes of 25 mm×25 mm and larger coming into common usage. While advantageous from a product standpoint, such reduced underfill gaps between die and substrate and increased die sizes create certain manufacturing difficulties. One difficulty of particular importance deals with the problem of effectively cleaning the underfill space.
During conventional cleaning the solvent propagates into the underfill space by capillary action. Because the assembly is immersed in solvent, the solvent propagates into the underfill space from all sides of the die. This results in air being trapped near the center of the underfill space. The presence of air prevents the solvent from effectively propagating further into the underfill space. Furthermore, when solvent does propagate into the underfill space it is commonly not affected by the agitation of the cleaning process, meaning no fresh solvent recirculates into the underfill space. This has the unfortunate consequence of inadequately cleaning flux or other residues from the center regions of the underfill space. Also, once solvent is introduced into the underfill space it is not easily removed, consequently the contaminants suspended in the solvent remain in the underfill space.
What is needed is an improved process for removing flux and other residues from the underfill space between the semiconductor die and packaging substrate. Also needed are a system and apparatus for accomplishing the process. Finally, an improved packaging substrate is needed to facilitate these process improvements.
SUMMARY OF THE INVENTION
Accordingly, the principles of the present invention contemplate an electronic component structure having a conventional semiconductor die, with an active circuit surface having a plurality of conductive bumps formed thereon, mounted active surface down onto a top surface of a packaging substrate such that said conductive bumps are directly connected to a plurality of bonding pads formed on the top surface of said substrate to form a die/substrate assembly. An area between the packaging substrate and the die defining an underfill space. The packaging substrate includes an evacuation port which passes through the bulk of the packaging substrate. The port having openings in the top surface and a bottom surface of the packaging substrate, the top opening of the port being in communication with the underfill space. This assembly may be cleaned using the principles of the present invention.
In accordance with the principles of the present method for cleaning of flux and other residues from the die/substrate assemblies a die/substrate assembly is provided. A solvent filled solvent bath is provided. The die/substrate assembly is immersing in the solvent of the solvent bath. Solvent is drawn into the underfill space of the die/underfill substrate through said port. Alternatively, solvent may be injected into the underfill space through the port. Moreover, both approaches may be combined to modulate the solvent flow through the underfill space. The act of drawing and/or injecting solvent into the underfill space cleans the flux and residues from the underfill space of the die/substrate assembly. After cleaning, the underfill space can be rinsed. The die/substrate assembly is subject to further processing.
Also in accordance with the principles of the present invention an apparatus for cleaning electronic components is provided. The system comprises a solvent-containing solvent bath, a solvent flow means for flowing solvent under pressure into or out of an underfill space of a die/substrate assembly, and a rack for holding a plurality of die/substrate assemblies in position such that said solvent flow means can effectively flow solvent into the underfill spaces of the assemblies.
Other features of the present invention are disclosed or made apparent in the section entitled “DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT”.
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patent: 4475259 (1984-10-01), Ishii et al.
patent: 5002616 (1991-03-01), Ketelhohn
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patent: 5385869 (1995-01-01), Liu et al.
patent: 5696027 (1997-12-01), Crane, Jr.
patent: 5710071 (1998-01-01), Beddingfield et al.
patent: 5952726
Maheshwari Abhay
Shah Shirish
Carrillo Sharidan
Fitch Even Tabin & Flannery
LSI Logic Corporation
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