Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Reexamination Certificate
1999-10-12
2001-09-18
Dinh, Son T. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Including level shift or pull-up circuit
C365S189050, C326S030000
Reexamination Certificate
active
06292407
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to electronic circuitry. In particular, the present invention relates to methods and structures for providing updates for circuit variables.
BACKGROUND OF THE INVENTION
Impedance matching is one of the design challenges facing the electronics industry due to multiple reflections on transmission lines, e.g., traces on a printed circuit board (PCB). Not limiting these multiple reflections can cause problems that can have an impact at the digital level, including increased delays, increased overshoot and increased ringing (i.e., oscillations) in the signal response. In particular for point to point signaling, it is important to match the driver impedance of the circuit to the impedance of the transmission line to which the circuit is coupled such that the incident wave is roughly half of the driven voltage. Accordingly, as is well known in the art, when the reflection occurs, the reflective wave is approximately the driven voltage and thereby eliminating undershoot and/or overshoot between the circuits connected by the transmission line.
One approach for matching the impedance between a circuit and the transmission line to which the circuit is coupled is to have an onboard controller on the circuit control the impedance. In such a system, the onboard controller periodically updates the impedance of the data output of the circuit to which the transmission line is connected. However, because the data output may be driving data at the point in time when the onboard controller completes the computation of the impedance and is attempting to update the impedance, changing of the impedance value at the data output of the circuit may be hazardous. In particular, if the impedance value at the data output is changing while the data output is transmitting data, intermediate values of the impedance are completely random and could result in values that are not close to the intended impedance for the data output.
One approach to avoid this type of hazard is to limit the updates of the impedance value at the data output such that the updates only occur during a tristated cycle. However, one shortcoming of this approach is that with a separate input/output circuit a tristate cycle may never occur as continuous reads could occur at the data output of the circuit to which the transmission line is connected. For these and other reasons there is a need for the present invention.
SUMMARY OF THE INVENTION
The above-mentioned problems with output driver impedance updates and other problems are addressed by the present invention and will be understood by reading and studying the following specification. Structures and methods are described which accord improved benefits for output driver impedance updates.
In particular, improved methods and structures are provided that allow for the updating of output driver impedances for a circuit to match the impedance of the transmission line to which the circuit is coupled. Additionally, improved methods and structures are provided which allow for a reliable updating of the output driver impedance without requiring the output driver to be tristated in order to prevent data loss.
Embodiments of a method of forming an integrated circuit include coupling a data line to an enable input of a holding device. The method also includes coupling at least one impedance line to a data input of the holding device. The at least one impedance line carries an impedance signal. Further, an impedance of the data line at a data output of the memory device is capable of being updated to a value equal to the impedance update signal when the data line is quiescent. The term quiescent is defined as inactivity (e.g., when the data line is tristated or is in a high impedance mode). The present invention also includes structures as well as systems incorporating such structures all formed according to the methods provided in this application.
These and other embodiments, aspects, advantages, and features of the present invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art by reference to the following description of the invention and referenced drawings or by practice of the invention. The aspects, advantages, and features of the invention are realized and attained by means of the instrumentalities, procedures, and combinations particularly pointed out in the appended claims.
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Porter John D.
Weber Larren Gene
Dinh Son T.
Micron Technolgy, Inc.
Schwegman Lundberg Woessner & Kluth P.A.
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