Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
1997-03-07
2001-02-06
De Cady, Albert (Department: 2784)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C714S736000, C324S537000, C324S550000
Reexamination Certificate
active
06185705
ABSTRACT:
CROSS-REFERENCE TO OTHER APPLICATIONS
Filed on the same date as this application is U.S. patent application of Don Morgan, Ser. No. 08/813,063, now U.S. Pat. No. 5,952,833 and U.S. patent application of Douglas J. Cutter, Fan Ho, Kurt D. Beigel, Brett M. Debenham, Dien Luong, Kim M. Pierce, and Patrick J. Mullarkey, Ser. No. 08/813,767, Entitled: “METHOD AND APPARATUS FOR CHECKING THE RESISTANCE OF PROGRAMMABLE ELEMENTS.”, now U.S. Pat. No. 5,982,656.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to integrated circuit products, and more particularly, to method and apparatus for verifying the programming of antifuse elements in integrated circuits.
2. Description of the Related Art
Contemporary memory products require a high degree of redundancy in order to improve manufacturing yields. Present redundancy techniques in memory products include providing extra memory array columns and/or extra memory array rows which can be used to replace defective columns and/or rows.
Antifuses have been used as nonvolatile programmable memory elements to store logic states for implementing row and column redundancy in DRAMs. When used for redundancy implementation, antifuses are usually constructed in the same manner as the memory cell capacitors in the DRAM array. However, antifuses have other uses in memory products besides redundancy implementation. Antifuses may, for example, be used in integrated circuit memory as a mechanism for changing the operating mode of the memory or may be programmed to encode identification information about the memory, e.g., fabrication date.
An antifuse is, by definition, a two-terminal device which functions as an open circuit until programmed. Ideal programming of an antifuse results in a permanent short circuit existing between the two terminals. However, programming usually results in a resistance existing between the two terminals. The magnitude of this resistance is an indicator of whether the antifuse was successfully programmed.
Determining the resistances of antifuses in a DRAM has traditionally been accomplished by placing a DRAM in an automated circuit testing device (commonly referred to as Automated Test Equipment or ATE) and measuring the resistance of each antifuse parametrically. The measurement procedure involves physically measuring the current draw through each antifuse using a prober or similar measurement instrument. The process of measuring the current draw of individual antifuses requires placement of the probe and generation of several signals to and from the ATE. Even with the speed and sophistication of existing probers, the procedure routinely consumes 10 to 20 milliseconds per antifuse.
In a past era when 4 Megabit DRAMs represented the leading edge in DRAM sophistication, measurement times of 10 to 20 milliseconds per antifuse yielded acceptable economics for manufacturers. This was due to the relatively small number of antifuses per DRAM (approximately 20). However, the number of antifuses in a typical DRAM has increased dramatically as the circuit density of DRAMs has increased. Whereas a 4 Megabit DRAM may contains approximately 20 antifuses, a 64 Megabit DRAM may have approximately 640 antifuses, and a 256 Megabit DRAM some 5000. The time required to measure the antifuse programming for such higher density DRAMs using conventional parametric methods represents a significant strain on manufacturing efficiency.
SUMMARY OF THE INVENTION
In one aspect of the present invention, a method of checking the resistance of an antifuse element in an integrated circuit is provided. The method includes the step of producing a first voltage at a first node based based on the resistance of an antifuse element and producing a second voltage at a second node based on a known resistance. The first voltage is then compared to the second voltage and an output signal is produced in response to the comparison of the first and second voltages. The binary value of the output signal indicates whether the resistance of the antifuse element is higher or lower than the known resistance.
In another aspect of the present invention, an apparatus for checking the resistance of antifuse elements in an integrated circuit is provided. The apparatus includes circuitry defining a bit of antifuse. The circuitry defining the bit of antifuse includes an antifuse element that has a resistance. The circuitry defining the bit of antifuse also includes a first node at which a voltage may be developed that is based on the resistance of the antifuse element. The apparatus also includes circuitry for producing a reference voltage at a second node. The reference voltage is based on the value of a known resistance. Finally, the apparatus includes circuitry which compares the voltage on the first node to the reference voltage on the second node and which produces an output signal whose binary value indicates whether the value of the resistance of the antifuse element is higher or lower than the value of the known resistance.
In a further aspect of the present invention, an apparatus in an integrated circuit is provided. The apparatus includes a plurality of bits of antifuse. Each bit of antifuse includes an antifuse element that has a resistance, and a first node at which a voltage may be developed that is based on the resistance of the antifuse element. The first nodes of all bits of antifuse are joined in a common connection. The apparatus also includes selection circuitry for selecting one of the bits of antifuse, and circuitry for producing a reference voltage at a second node. The reference voltage is based on the value of a known resistance. Finally, the apparatus includes circuitry which compares the voltage at the first node of the selected bit of antifuse to the reference voltage at the second node and which produces an output signal whose binary value indicates whether the value of the resistance of the antifuse element in the selected bit of antifuse is higher or lower than the value of the known resistance.
In still another aspect of the present invention, an integrated circuit is provided that includes a plurality of bits of antifuse. Each bit of antifuse includes an antifuse element that has a resistance and a first node at which a voltage may be developed that is based on the resistance of the antifuse element. The first nodes of all bits of antifuse are joined in a common connection. There is a decoder for decoding a first address signal and sending a first enabling signal to each of the plurality of bits of antifuse. A reference circuit is provided for producing a reference voltage at a second node. The reference voltage is based on the value of a known resistance. Finally, there is a comparator circuit which compares the voltage at the first node of the selected bit of antifuse to the reference voltage at the second node and which produces an output signal whose binary value indicates whether the value of the resistance of the antifuse element in the selected bit of antifuse is higher or lower than the value of the known resistance.
In yet a further aspect of the present invention, a semiconductor memory device is provided that includes a memory array and a plurality of bits of antifuse. Each bit of antifuse includes an antifuse element that has a resistance and a first node at which a voltage may be developed that is based on the resistance of the antifuse element. The first nodes of all bits of antifuse are joined in a common connection. Means are provided for producing a first voltage at a first node based on a known resistance. In addition, means are provided for producing a second voltage at a second node based on the resistance of an antifuse element. Finally, means are provided for comparing the first voltage to the second voltage and for producing an output signal in response to the comparison, the binary value of the output signal indicating whether the resistance of the antifuse element is higher or lower than the known resistance.
REFERENCES:
patent: 4290013 (1981-09-01), Thiel
patent: 4841286 (1989-06-01), Kum
Beigel Kurt D.
Cutter Douglas J.
Debenham Brett M.
Ho Fan
Luong Dien
Cady Albert De
Fletcher Yoder & Van Someren
Micro)n Technology, Inc.
Ton David
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