Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2004-09-03
2008-05-27
Louis-Jacques, Jacques (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C324S073100, C326S021000
Reexamination Certificate
active
07380182
ABSTRACT:
Apparatus and method for checking output signals of an integrated circuit are provided. One embodiment provides a method for checking whether signals are output by a write circuit of an integrated circuit according to a predefined specification. In this context, the high precision of an external test device which is inherent to the system is used to check, within a module, that a data signal and a data sampling signal of the integrated circuit are output according to a specification.
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German Patent Office Examination Report Dated May 24, 2004.
Beer Peter
Schramm Achim
Versen Martin
Abraham Esaw
Infineon - Technologies AG
Louis-Jacques Jacques
Patterson & Sheridan L.L.P.
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