Method and apparatus for checking output signals of an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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C324S073100, C326S021000

Reexamination Certificate

active

07380182

ABSTRACT:
Apparatus and method for checking output signals of an integrated circuit are provided. One embodiment provides a method for checking whether signals are output by a write circuit of an integrated circuit according to a predefined specification. In this context, the high precision of an external test device which is inherent to the system is used to check, within a module, that a data signal and a data sampling signal of the integrated circuit are output according to a specification.

REFERENCES:
patent: 5696772 (1997-12-01), Lesmeister
patent: 6105157 (2000-08-01), Miller
patent: 6260154 (2001-07-01), Jeddeloh
patent: 6480016 (2002-11-01), Motoi et al.
patent: 6643787 (2003-11-01), Zerbe et al.
patent: 6950956 (2005-09-01), Zerbe et al.
patent: 100 34 852 (2002-02-01), None
patent: 101 04 575 (2002-08-01), None
patent: 101 17 891 (2002-10-01), None
patent: 101 45 745 (2003-04-01), None
German Patent Office Examination Report Dated May 24, 2004.

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