Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
1998-12-29
2002-09-17
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
06453435
ABSTRACT:
STATEMENT REGARDING COPYRIGHT RIGHTS
A portion of this patent disclosure is material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all copyright rights whatsoever.
TECHNICAL FIELD OF THE INVENTION
This invention relates generally to testing of units such as electronic circuit boards and, more particularly, to computerized systems for automated testing of such units.
BACKGROUND OF THE INVENTION
Over the years, as integrated circuits have become progressively more complex and sophisticated, electronic circuit boards which use these integrated circuits have also become progressively more complex and sophisticated. Consequently, in order to accurately test these electronic circuit boards, more and more sophisticated techniques have been required. In particular, circuit board manufacturers have decreased the use of manual testing techniques in favor of automated and computerized testing techniques. A resulting problem is the efficient development of test definitions, which are stored by the test system and which are then automatically carried out in order to effect testing.
A traditional approach has been to prepare a custom computer program which implements a test definition, and to then compile the program into an executable object code file, which is executed in order to carry out the required sequence of test operations. While this approach has been generally adequate for its intended purposes, it has not been entirely satisfactory in all respects. For example, in order to prepare a test definition, a test developer must be highly proficient in a sophisticated computer programming language such as assembly language, and there is thus a steep learning curve and a significant amount of training required in order for a person to obtain the minimum skills required to develop even a simple test definition. Further, each test definition may require the development of auxiliary routines, such as special low-level instrument drivers, special data logging routines, and so forth. Different test developers may prefer different languages, which makes it difficult for one test developer to quickly comprehend a program developed by another test developer, even when the source code is readily available.
Test definitions written in a selected language will typically require certain hardware-specific characteristics, such as device addresses, to be embedded therein. This limits the portability of a given test definition between various different test systems that are theoretically capable of testing the same circuit board, at least without significant time and effort to effect revisions. Because the programs are compiled, it is difficult to debug and troubleshoot the programs during development, and it is relatively cumbersome to adjust the test definitions when faced with a uniquely elusive problem in a particular circuit board. Due to the steep learning curve and the significant training time required to become proficient in a computer programming language, the operators who ultimately use the test system to test production boards will typically not be given such training. Consequently, they will simply run the specified test definitions without fully understanding what the tests are doing.
Another consideration is that it is difficult to train an operator to accurately conduct tests on a variety of different types of units, because it becomes more and more difficult for the operator to remember each of the various sequences of manual steps which must be carried out for each of the respective different types of units. For example, it may be necessary to connect an optical cable to one type of unit, but not to connect any such cable to a different type of unit. It is possible for an operator to inadvertently select the wrong test definition for use in testing a given circuit board. In a situation where a circuit board .has a programmable part which must be programmed, it is possible for an operator to inadvertently select the wrong information for use in programming the programmable part. There is also a need to be able to easily switch between a normal level of testing and a more rigorous level of testing, without necessarily requiring the operator to select one of two different test definitions, and without requiring a test developer to develop two entirely separate test definitions for the same unit.
SUMMARY OF THE INVENTION
From the foregoing, it may be appreciated that a need has arisen for automated test techniques in which test definitions are represented in a form that is intuitive and requires minimal training, which has features facilitating debug and dynamic alteration of test definitions, which can provide an operator with step-by-step instructions for manual acts required by each test definition, which permits a single test definition to selectively carry out different levels of testing, which automates the selection of test definitions, and/or which automates the selection of information that is to be programmed into a programmable part on a unit under test.
According to one form of the present invention, a technique is provided to address this need, and involves a test station which includes: a coupling portion operative to facilitate a detachable operative coupling of the test station to a unit to be tested; a memory portion which stores a program and a test file, the test file containing a test definition which specifies at least one test operation to be carried out by the test station through the coupling portion, the test definition being in the form of at least one command which is in an operator perceptible, uncompiled format; and a processor portion operatively coupled to the memory portion and the coupling portion, the processor portion being operative to execute the program, and the program causing the processor portion to process commands in the test file in an interpretive manner so as to cause the test definition to be carried out.
Another form of the invention involves a test station which includes: a coupling portion operative to facilitate a detachable operative coupling of the test station to a unit to be tested; a memory portion which stores a program and a test definition, the test definition including a first portion and a second portion, the first portion specifying a first test operation to be carried out by the test station through the coupling portion and the second portion specifying a second test operation to be carried out by the test station through the coupling portion; and a processor portion operatively coupled to the memory portion and the coupling portion, the processor portion being operative to execute the program, wherein the program causes the processor portion to permit an operator to selectively specify one of a first operational mode and a second operational mode, and causes the processor portion to access and process the test definition, wherein in the first operational mode the processor portion processes both the first portion and the second portion of the test definition so as to carry out both of the first and second test operations, and wherein in the second operational mode the processor portion processes only the first portion of the test definition to the exclusion of the second portion thereof so as to carry out only the first test operation without the second test operation.
Yet another form of the invention involves a test station which includes: a coupling portion operable to facilitate a detachable operative coupling of the test station to a unit to be tested; an output portion through which information can be communicated to an operator; a memory portion which stores a test definition; and a processor portion operatively coupled to the coupling portion, the memory portion, and the output portion, the processor portion being operative in response to the test definition to use the output portion to successively c
Beasley Robert A.
Limon, Jr. Rogelio
Riley John T.
Baker & Botts L.L.P.
De'cady Albert
Fujitsu Network Communications, Inc.
Torres Joseph D.
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