Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
Reexamination Certificate
2005-11-08
2005-11-08
Browne, Lynne H. (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
Using delay
C713S400000, C713S500000, C713S503000, C326S093000
Reexamination Certificate
active
06963989
ABSTRACT:
A method and apparatus are disclosed for adjusting the individual data hold time of data output buffers. Clock signals for the output buffers are respectively and individually adjusted for each of the output buffers to ensure a desired timing relationship among all of the data output by the buffers.
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Cullum James S.
Renfro Steven
Browne Lynne H.
Dickstein , Shapiro, Morin & Oshinsky, LLP
Micro)n Technology, Inc.
Trujillo James K.
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