Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
1999-07-02
2001-07-10
Picardat, Kevin M. (Department: 2823)
Semiconductor device manufacturing: process
With measuring or testing
C438S016000, C438S017000
Reexamination Certificate
active
06258610
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to the field of semiconductor manufacturing, and more particularly, this invention relates to the field of analyzing a semiconductor surface using line width metrology.
BACKGROUND OF THE INVENTION
Methodologies for testing wafers during the manufacturing process is becoming increasingly important as devices are produced in smaller and more tight wafer configurations. Usually, destructive cross-sections of wafers are obtained to assess the quality of the wafer. However, this is a destructive process, and as a result, only a small number of wafers are selected for testing. In some instances, electrical tests at the end of the wafer determine if any deficiencies exist by accessing the quality of the semiconductor device formed on the wafer. Even if defects are detected, however, these defects were not detected until the end of wafer processing. As a result, those problems in the manufacturing process or with the equipment used during the manufacturing may not be detected and numerous defective wafers may be produced before problems with the manufacturing processes are detected.
Scanning electron microscopes (SEM) and similar line width metrology tools have been successfully used in semiconductor manufacturing processes. However, it is often difficult for an operator to detect errors by simply viewing the waveform from a scanning electron microscope.
In commonly assigned and copending patent application serial number 08/957,122, filed Oct. 24, 1997, entitled “SCANNING ELECTRON MICROSCOPE SYSTEM AND METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT,” the disclosure which is hereby incorporated by reference in its entirety, a wafer is analyzed and includes the step of scanning the wafer to produce a scanned waveform signal, which is then processed and compared to a reference signal to access the wafer. The scanned waveform signal is processed using an auto-correlation operation to produce a processed signal, which is compared to a reference signal. However, in that application, there is no weighting of the various parts to emphasize or diagnose signal deviations to allow the physical relationship between the signal parts and the physical object to be separated. Thus, it is possible to confound any scale of patterned features.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a method for analyzing a semiconductor surface having patterned features using a correlated waveform signal where the physical relationship between the signal parts and the physical object to be separated can be analyzed.
In accordance with the present invention, a method for analyzing a semiconductor surface having patterned features on the surface comprises the steps of scanning at least one patterned feature to produce a scanned waveform signal having signal segments corresponding to characteristic surface portions of the patterned feature. The signal segments are processed using an auto-correlation function to produce an auto-correlation signal for each characteristic surface portion of the patterned feature. A reference signal has signal segments corresponding to characteristic surface portions of a known patterned feature. Each segment of the auto-correlation signal is compared to the respective signal segments of the reference signal.
The method further comprises the step of cross-correlating each segment of the reference signal and the processed signal to produce an assessment value for each segment corresponding to characteristic portions of the patterned feature. The patterned feature could be acceptable if the assessment value is greater than 0.9. The assessment value could be as high as 0.95 to determine if the patterned feature is acceptable. The measurement device can be a scanning electron microscope or other similar device, such as a stylus, and a tool can be adjusted in response to the comparing step.
REFERENCES:
patent: 4600839 (1986-07-01), Ichihashi et al.
patent: 4751384 (1988-06-01), Murakoshi et al.
patent: 4767926 (1988-08-01), Murakoshi et al.
patent: 5917332 (1999-06-01), Chen et al.
Blatchford James W.
Jessen Scott
Kane Brittin C.
Layadi Nace
McIntosh John M.
Agere Systems Guardian Corp.
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Collins D. M.
Picardat Kevin M.
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