Metallization process of semiconductor device

Details Metallization process of semiconductor device Metallization process of semiconductor device

1999-05-12

2001-11-20

Whitehead, Jr., Carl (Department: 2822)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S625000, C438S687000, C438S688000

Reexamination Certificate

active

06319825

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a metallization process of a semiconductor device, more particularly to a metallization process capable of improving reliability in the metallization.
BACKGROUND OF THE INVENTION
Referring to
FIG. 1
, a conventional metallization process of semiconductor device will be discussed.
An intermediate insulating layer
12
is formed on a semiconductor substrate
10
having a junction region
11
. And then, a contact hole H is formed by etching the intermediate insulating layer
12
so as to expose a predetermined portion of the junction region
11
. A first Ti layer
13
as a glue layer is deposited on the intermediate insulating layer
12
and at bottom and inner surfaces of the contact hole H, and successively a first TiN layer
14
as a barrier metal is deposited by a sputtering technology. Herein, the first Ti layer
13
serves for improving the adhesive characteristics between the surface of semiconductor substrate
10
, the intermediate insulating layer
12
and the first TiN layer
14
. The barrier metal, i.e. the first TiN layer
14
restrains electromigration between the semiconductor substrate
10
and a metal wiring layer to be formed later thereby preventing junction spiking in the junction region
11
. Afterward, the Rapid Thermal Annealing(RTA) is performed and then, a titanium silicide layer
13
a is formed at an interface of the junction region
11
and the first Ti layer
13
. Next, a second Ti layer
15
as a glue layer is deposited on the top surface of the first TiN layer
14
. Herein, the second Ti layer
15
serves for improving the adhesive characteristics between a metal wiring layer to be formed later and the first TiN layer
14
. A metal wiring layer
16
is formed on the second Ti layer
15
. To prevent silicon atoms' migration from the junction region
11
to metal wirings, an alloy layer of aluminum with silicon can be used for the metal wiring layer
16
. A second TiN layer
17
as an anti-reflective coating layer is formed on the metal wiring layer
16
.
When a predetermined heat, for example at temperature of above 35° C., is applied to the second Ti layer
15
and the metal wiring layer
16
, they easily react each other and a TiAl
3
compound
15
a
is precipitated therebetween. At this time, the TiAl
3
compound
15
a
has a high resistance that increases the resistance in the metal wirings, which also causes signal delays in semiconductor device. Furthermore, some portions of the metal wiring layer
16
are left behind thereby increasing current density. Accordingly, reliability in the metallization is degraded.
Also, as the semiconductor device is getting integrated, the contact size becomes smaller. Accordingly, it is difficult for the aluminum layer formed by the sputtering technology to fill up the narrow inner space of the contact region H. Therefore, a void is formed or the metal wiring layer is disconnected within the contact hole H.
Furthermore, when the aluminum alloy layer with silicon is used as a metal wiring layer for preventing the electromigration, silicon atoms in the alloy layer are precipitated in the shape of silicon nodule during sequential annealing processes. For the above reasons, reliability in the metallization is degraded.
SUMMARY OF THE INVENTION
Accordingly, one object of the present invention is to improve the conductive characteristics in the metallization and obtain the reliability therein.
The other object of the invention is to fill up the fine contact hole with the metal wirings easily.
So as to accomplish the above objects, the present invention includes the steps of: providing a semiconductor substrate having a junction region; forming an insulating layer on the upper of the semiconductor substrate; forming a contact hole by patterning the insulating layer so as to expose one portion of the junction region; forming a glue layer on the upper of the insulating layer, and at the bottom and the inner surfaces of the contact hole; forming a barrier metal layer on the glue layer; forming an Mg layer as a solid solution layer on the barrier metal layer; forming a metal layer on the Mg layer; and forming a metal wiring layer having more liquidity than that of the metal layer, by melting the Mg layer to the metal layer.
The present invention further includes the steps of: providing a semiconductor substrate having a junction region; forming an insulating layer on the upper of the semiconductor substrate; forming a contact hole by patterning the insulating layer so as to expose one portion of the junction region; forming a glue layer on the upper of the insulating layer, and at the bottom and the inner surfaces of the contact hole; forming a barrier metal layer on the glue layer; and forming an Mg layer as a solid solution layer on the barrier metal layer; forming a metal layer on the Mg layer, wherein the step of forming the Mg layer further comprises a step of depositing some portions of the metal layer at a selected thickness under a first temperature condition and a step of depositing the metal layer and simultaneously melting the Mg layer to the metal layer by depositing the rest of selected thickness under a second temperature condition, the first temperature is lower than the second temperature.
The present invention further includes the steps of: providing a semiconductor substrate having a junction region; forming an insulating layer on the upper of the semiconductor substrate; forming a contact hole by patterning the insulating layer so as to expose one portion of the junction region; forming a glue layer on the upper of the insulating layer, and at the bottom and the inner surfaces of the contact hole; forming a barrier metal layer on the glue layer; forming a metal layer on the barrier metal layer; forming an Mg layer as a solid solution layer on the metal layer; and forming a metal wiring layer having more liquidity than that of the metal layer, by melting the Mg layer to the metal layer.
The present invention further includes the steps of: providing a semiconductor substrate having a junction region; forming an insulating layer on the upper of the semiconductor substrate; forming a contact hole by patterning the insulating layer so as to expose one portion of the junction region; forming a glue layer on the upper of the insulating layer, and at the bottom and inner surfaces of the contact hole; forming a barrier metal layer on the glue layer; forming a metal layer on the barrier metal layer; and forming an Mg layer as a solid solution on the metal layer, wherein the Mg layer is deposited at a temperature that the Mg is meltable to the metal layer in the step of forming the Mg layer.
The present invention further includes the steps of: providing a semiconductor substrate having a junction region; forming an insulating layer on the upper of the semiconductor substrate; forming a contact hole by patterning the insulating layer so as to expose one portion of the junction region; forming a glue layer on the upper of the insulating layer, and at the bottom and the inner surfaces of the contact hole; forming a barrier metal layer on the glue layer; forming a first metal layer on the barrier metal layer; forming an Mg layer on the first metal layer; forming a second metal layer on the Mg layer; and forming a metal wiring layer having more liquidity than that of the metal layers, by melting the Mg layer to the first and the second metal layers.


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patent: 5711858 (1998-01-01), Kontra et al.
patent: 5747360 (1998-05-01), Nulman
patent: 5913146 (1999-06-01), Merchant et al.
patent: 95-10039 (1995-09-01), None

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