Semiconductor device manufacturing: process – Semiconductor substrate dicing – Having specified scribe region structure
Reexamination Certificate
2005-10-04
2005-10-04
Smith, Brad (Department: 2829)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
Having specified scribe region structure
C438S460000, C438S110000
Reexamination Certificate
active
06951801
ABSTRACT:
A process for removing metal from a scribe area of a semiconductor wafer. The metal removed may include exposed metal in a saw path of the scribe area and the metal in a crack stop trench of the scribe area. In one example, copper is removed from the scribe area by wet etching the wafer. In one example, the wet etching process is performed after the removal of an exposed barrier adhesion layer on the wafer surface. Removal of the metal in the saw path may reduce the amount of metal buildup on a saw blade during singulation of the die areas of a wafer.
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patent: 6271578 (2001-08-01), Mitwalsky et al.
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patent: 2003/0197289 (2003-10-01), Lin
patent: 2004/0219766 (2004-11-01), Headley et al.
“Construction Analysis, IBM PowerPC 750 RISC Microprocessor (Copper) with TEM Analysis,” Report Number SCA 9808-587, Integrated Circuit Engineering, Scottsdale, Arizona.
Pozder Scott K.
Ramanathan Lakshmi N.
Uehling Trent S.
Dolezal David G.
Freescale Semiconductor Inc.
King Robert L.
Smith Brad
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