Metal oxide semiconductor transistor with reduced gate...

Details Metal oxide semiconductor transistor with reduced gate... Metal oxide semiconductor transistor with reduced gate...

2011-06-14

2011-06-14

Louie, Wai-Sing (Department: 2814)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S149000, C438S479000, C438S517000, C257S345000, C257SE29201

Reexamination Certificate

active

07960229

ABSTRACT:
A metal oxide semiconductor transistor device having a reduced gate height is provided. One embodiment of the device includes a substrate having a layer of semiconductor material, a gate structure overlying the layer of semiconductor material, and source/drain recesses formed in the semiconductor material adjacent to the gate structure, such that remaining semiconductor material is located below the source/drain recesses. The device also includes shallow source/drain implant regions formed in the remaining semiconductor material, and epitaxially grown, in situ doped, semiconductor material in the source/drain recesses.

REFERENCES:
patent: 6787850 (2004-09-01), Pelloie
patent: 2008/0001170 (2008-01-01), Lindert et al.

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