Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-04-07
1999-12-28
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438301, 438303, 438585, 430313, 430319, 430331, H01L 21336
Patent
active
060081007
ABSTRACT:
A method of fabricating a MOS FET is provided. An oxide layer and a polysilicon layer are successively formed on the semiconductor substrate. A pyramidical photoresist layer is used as a mask for forming a hat-shaped gate structure. A first ion implantation process is performed to form an LDD structure.
REFERENCES:
patent: 4394182 (1983-07-01), Maddox, III
patent: 5156986 (1992-10-01), Wei et al.
patent: 5830605 (1998-11-01), Umeki et al.
patent: 5830787 (1998-11-01), Kim
Chou Jih-Wen
Sun Shih-Wei
Yeh Wen-Kuan
Ghyka Alexander G.
Niebling John F.
United Microelectronics Corp.
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