Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2008-12-02
2010-06-22
Smith, Matthew (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C257S751000, C257SE21495, C257SE21141
Reexamination Certificate
active
07741216
ABSTRACT:
A metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate and having a metal line forming region. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer. The diffusion barrier has a multi-layered structure of a V layer, a VxNylayer and a VxNyOzlayer. A metal layer is formed on the diffusion barrier to fill the metal line forming region of the insulation layer.
REFERENCES:
patent: 5985759 (1999-11-01), Kim et al.
patent: 6528180 (2003-03-01), Lee et al.
patent: 2005/0186793 (2005-08-01), Omoto et al.
patent: 2006/0018057 (2006-01-01), Huai
patent: 2006/0113675 (2006-06-01), Chang et al.
patent: 2003-17437 (2003-01-01), None
patent: 2004-323493 (2004-11-01), None
patent: 2006-93552 (2006-04-01), None
patent: 100126654 (1997-10-01), None
patent: 1020010090729 (2001-10-01), None
Jung Dong Ha
Kim Baek Mann
Kim Jeong Tae
Yeom Seung Jin
Hynix / Semiconductor Inc.
Ladas & Parry LLP
Smith Matthew
Swanson Walter H
LandOfFree
Metal line of semiconductor device and method for forming... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Metal line of semiconductor device and method for forming..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Metal line of semiconductor device and method for forming... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4205920