Metal-insulator-metal (MIM) capacitor structure formed with...

Details Metal-insulator-metal (MIM) capacitor structure formed with... Metal-insulator-metal (MIM) capacitor structure formed with...

2007-06-12

2007-06-12

Nguyen, Cuong (Department: 2811)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S238000, C438S387000

Reexamination Certificate

active

11286999

ABSTRACT:
A microelectronic product and a method for fabricating the same each provide a capacitor formed interposed between a first dielectric layer and a second dielectric layer formed over a substrate having a first contact region and a second contact region exposed therein. The capacitor is also connected to a first conductor stud that penetrates the first dielectric layer and contacts the first contact region and a second conductor stud that penetrates the second dielectric layer. A contiguous conductor interconnect and conductor stud layer is formed within a dual damascene aperture through the second dielectric layer and the first dielectric layer and contacting the second contact region. An etch stop layer employed when forming a trench within the dual damascene aperture also passivates a capacitor sidewall.

REFERENCES:
patent: 6492222 (2002-12-01), Xing
patent: 6734079 (2004-05-01), Huang et al.
patent: 2006/0166430 (2006-07-01), Rinerson et al.

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