Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1981-09-28
1983-10-04
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365230, G11C 1140
Patent
active
044083050
ABSTRACT:
A memory can be divided to provide a reduced number of accessible memory elements. By selectively causing an individual address to always assume a predetermined logic state, the number of accessible memory elements is reduced by one half. The selection as to which half is accessible is achieved by applying to an array divider circuit the individual address signal data logic state which corresponds to the predetermined logic state then applying to the array divider circuit an array divider signal. The array divider circuit subsequently provides the individual address signal at the predetermined logic state effectively reducing the number of accessible memory elements by one half.
REFERENCES:
patent: 3402398 (1968-09-01), Koenner
Clingan, Jr. James Lee
Fears Terrell W.
Motorola Inc.
Myers Jeffrey Van
Sarli, Jr. Anthony J.
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