Memory with improved BIST

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S201000, C365S189040

Reexamination Certificate

active

07656726

ABSTRACT:
An integrated circuit device includes an embedded memory having a plurality of memory macros and a built-in-self-test (BIST) circuit coupled to the plurality of memory macros for simultaneous operation of the memory macros, wherein the BIST circuit is configured to select from the memory macros' data outputs an individual memory macro's data output for analysis while the memory macros are operated simultaneously.

REFERENCES:
patent: 6104731 (2000-08-01), Chow
patent: 6216241 (2001-04-01), Fenstermaker et al.
patent: 6512709 (2003-01-01), Nakahara et al.
patent: 6941499 (2005-09-01), Sung et al.
patent: 2003/0030073 (2003-02-01), Saotome et al.
patent: 2004/0213058 (2004-10-01), Shimizu et al.
patent: 2005/0007172 (2005-01-01), Sadakata et al.
patent: 2005/0157565 (2005-07-01), Lee
patent: 2006/0190215 (2006-08-01), Hsieh et al.
patent: 2007/0007985 (2007-01-01), Motomochi

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Memory with improved BIST does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory with improved BIST, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory with improved BIST will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4219910

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.