Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2006-10-10
2006-10-10
Mai, Son (Department: 2827)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S193000, C365S194000
Reexamination Certificate
active
07120067
ABSTRACT:
A circuit for latching data into a memory includes a receiver, a delay, and a selector. The receiver is configured for receiving a data signal, and the delay is configured to delay the data signal to provide a delayed data signal. The selector is configured to receive the delayed data signal, a data strobe signal, and an inverted data strobe signal and provide a first strobe signal and a second strobe signal in response to the delayed data signal, the data strobe signal, and the inverted data strobe signal. Rising edge data is latched into the memory in response to the first strobe signal and falling edge data is latched into the memory in response to the second strobe signal.
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Dicke Billig & Czaja, PLLC
Mai Son
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