Memory system which copies successive pages, and data copy...

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Reexamination Certificate

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Details

C365S185120, C365S185170

Reexamination Certificate

active

11216215

ABSTRACT:
A memory system includes a memory cell array, a bit line switch, first and second page buffers, a column switch, an error correction circuit, and control circuits. The second page buffer can swap data with the first page buffer. The control circuits controls the bit line switch and the first and second page buffers, sequentially reads, page by page, one or more pages from the mth (m is a positive integer) page to the nth (n is an integer greater than m) page of the first block in the memory cell array, controls the error correction circuit to perform error correction calculation by the error correction circuit, controls the first and second data buffers and the bit line switch, and controls to perform write in the second block in the erase state in the memory cell array.

REFERENCES:
patent: 6507508 (2003-01-01), Hosono et al.
patent: 6868007 (2005-03-01), Hasegawa et al.
patent: 7085160 (2006-08-01), Shiga et al.
patent: 7161850 (2007-01-01), Shiga et al.
patent: 2000-251484 (2000-09-01), None
patent: 2002-141477 (2002-05-01), None

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