Static information storage and retrieval – Read/write circuit – Multiplexing
Patent
1988-05-02
1990-12-04
Heckler, Thomas M.
Static information storage and retrieval
Read/write circuit
Multiplexing
36518912, 365238, 365220, 364243, 3642392, 364238, 364964, 3649395, 364942, G11C 700, G11C 1900, G06F 1300
Patent
active
049758802
ABSTRACT:
The present invention constitutes a memory system comprising a multiple number of individual memory units (40-47) for storing digital data from a variable number of data input streams and for efficiently using the memory capacities of the memory units in the system by controlling the routing of data between the memory units. Each one of the memory units includes a set of input multiplexers (100-103), a set of shift/shadow registers (110-113) and a memory component (120) having a RAM memory array (121). The components of the memory units are implemented on a single integrated circuit chip. The input multiplexers allow alternate data streams to be selected for input to the shift/shadow registers. The shift/shadow registers are operative for enabling data to be transferred to and from the memory array at speeds slower than the rate at which these data are received by the system. The memory units are interconnected so that data can be routed from the outputs of the units to the inputs of other units in the system as alternative input data. Alternative memory systems are also provided which include memory units arranged for storing data bits of equal significance level within each memory unit through the use of internal connections between the outputs of shift/shadow registers and the input multiplexers in the units which facilitate the internal routing of data within individual memory units.
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Knierim Daniel G.
Martin John A.
Heckler Thomas M.
Horn John J.
Meza Peter J.
Ray Gopal C.
Tektronix Inc.
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