Memory system and timing control method of the same

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing

Reexamination Certificate

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Details

C711S168000, C711S217000, C713S400000, C713S401000, C714S717000

Reexamination Certificate

active

07447862

ABSTRACT:
A memory system includes at least one memory module, each of which has a pattern data generating circuit for generating a pattern data, which has a plurality of memories to which a command signal is commonly applied and corresponding data is applied respectively; and a memory controller for respectively applying the command signal and the corresponding data to the plurality of memories, applying a pattern data generating command to the memory module during a timing control operation, calculating time differences among data of reaching each of the plurality of memories using the pattern data outputted from each of the memories and receiving and outputting data using the calculated data reaching time difference. Therefore, a stable data transmission is achieved between the memory controller and the memories.

REFERENCES:
patent: 5802594 (1998-09-01), Wong et al.
patent: 6247138 (2001-06-01), Tamura et al.
patent: 2002/0188816 (2002-12-01), Johnson et al.
patent: 2003/0013340 (2003-01-01), Martin et al.
patent: 2003/0177435 (2003-09-01), Budd et al.
patent: 1020030013340 (2003-02-01), None

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