Memory structure and method of manufacturing a memory array

Details Memory structure and method of manufacturing a memory array Memory structure and method of manufacturing a memory array

2006-01-02

2008-10-21

Chaudhari, Chandra (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21691

Reexamination Certificate

active

07439133

ABSTRACT:
A memory structure formed between two doping regions in a semiconductor substrate includes two conductive blocks functioning as floating gates formed at two sides of a first conductive line functioning as a select gat and insulated from the first conductive line with two first dielectric spacers therebetween, wherein the two conductive blocks each have a raised top and raised parts of sides relative to the top of the first conductive line. A first dielectric layer is formed on the tops and the parts of the sides of the two conductive blocks. A second conductive line functioning as a word line is formed on the first dielectric layer, wherein the second conductive line has a part deposited between the two conductive blocks and is substantially perpendicular to the first conductive line and two doping region functioning as bit lines.

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