Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2007-02-06
2007-02-06
Dinh, Son T. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S189050, C365S225700
Reexamination Certificate
active
10824905
ABSTRACT:
In a memory module having a designated group of memory cells assigned to represent a logical portion of the memory structure, a memory redundancy circuit having a redundant group of memory cells; and a redundancy controller coupled with the designated group and the redundant group. The redundancy controller, which can include a redundancy decoder, assigns the redundant group to the logical portion of the memory structure in response to a preselected memory group condition, e.g., a “FAILED” memory group condition. The redundancy controller also can include selectable switches, for example, fuses, which can encode the preselected memory group condition. The designated group of memory cells and the redundant group of memory cells can be a memory row, a memory column, a preselected portion of a memory module, a selectable portion of a memory module, a memory module, or a combination thereof.
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Broadcom Corporation
Dinh Son T.
McAndrews Held & Malloy Ltd.
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