Memory module with registers

Details Memory module with registers Memory module with registers

2004-10-27

2010-10-19

Chery, Mardochee (Department: 2186)

Electrical computers and digital processing systems: memory

Addressing combined with specific memory configuration or...

For multiple memory modules

C711S101000, C711S115000, C711S172000, C711SE12001, C365S230030

Reexamination Certificate

active

07818488

ABSTRACT:
Pairs of registers with reduced pins are disposed to overlap on front and back surfaces of a memory module. An input signal INS is transferred through the registers in series in a daisy chain fashion to avoid divergence of the input signal INS for preserved signal integrity. Each register buffers the input signal INS to memory banks disposed closely to sides of the register for reduced wiring area.

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patent: 2003/0169614 (2003-09-01), Bhakta et al.
Korean Patent Application No. 10-2002-7006116 to Sun Microsystems, Inc., having Publication date of Sep. 11, 2002 (w/ English Abstract page).
Japanese Patent No. JP55028191 to NT&T Corp., having Publication date of Feb. 28, 1980 (w/ English Abstract page).
Japanese Patent No. JP2001357672 to Hitachi Ltd., having Publication date of Dec. 26, 2001 (w/ English Abstract page).

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