Memory element with bipolar transistors in resettable latch

Details Memory element with bipolar transistors in resettable latch Memory element with bipolar transistors in resettable latch

1993-09-17

1994-09-20

Clawson, Jr., Joseph E.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365154, 365190, 365208, 365233, 307530, G11C 1140

Patent

active

053495543

ABSTRACT:
The invention relates to a memory element in current circuit technology having a first, a second and a third transistor pair each with emitter coupled transistors. Each of the second and third transistor pairs is connected in the collector circuit of a respective one of the transistors of the first transistor pair. Connected in each of the pairwise coupled collector circuits of the transistors of the second and third transistor pairs are a first resistor, the collector-to-emitter path of a further transistor with an output signal terminal disposed on the collector side and a second resistor. The collector of one transistor of a fourth transistor pair connected as a current switch is connected with the base of one of the further transistors. The setting and resetting of the memory element is made possible by the fourth transistor pair without increasing the capacitive load on the signal path of the memory element.

REFERENCES:
patent: 4506171 (1985-03-01), Evans et al.
patent: 4599526 (1986-07-01), Paski
patent: 4982119 (1991-01-01), Tateishi
patent: 5206550 (1993-04-01), Mehta

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