Memory devices including spacer-shaped electrodes on...

Details Memory devices including spacer-shaped electrodes on... Memory devices including spacer-shaped electrodes on...

2007-06-06

2009-10-13

Dickey, Thomas L (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257SE27103

Reexamination Certificate

active

07602005

ABSTRACT:
A NOR flash memory device includes a substrate having trenches that extend in a first direction and stepped portions that are arranged between the trenches. A bit region having a linear shape extends in a second direction substantially perpendicular to the first direction in the substrate. The bit region is doped with impurities. A first dielectric layer is on the substrate having the trenches. An electric charge trap layer is on the first dielectric layer. A second dielectric layer is on the electric charge trap layer. An upper electrode is on sidewalls of the trenches. The upper electrode has a spacer shape. Related fabrication methods are also described.

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patent: 6555866 (2003-04-01), Kuo
patent: 6649972 (2003-11-01), Eitan
patent: 2003/0209767 (2003-11-01), Takahashi et al.
patent: 2005/0224847 (2005-10-01), Masuoka et al.
patent: 2005/0259479 (2005-11-01), Yamanaka et al.
patent: 2003-332469 (2003-11-01), None
patent: 2005-268418 (2005-09-01), None

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