Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral configuration
Reexamination Certificate
2008-03-10
2010-10-12
Sorrell, Eron J (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral configuration
C710S008000, C710S074000, C711S005000, C711S170000, C711S171000, C365S233100
Reexamination Certificate
active
07814239
ABSTRACT:
A memory device is configured to operate in first and second data input/output modes. The memory device includes a first electrode pad, a second electrode pad, a clock signal line, a first switching unit, and a second switching unit. The clock signal line is configured to transmit a clock to an integrated circuit inside the memory device. The first switching unit switches to electrically connect the first electrode pad and the clock signal line in response to a control signal occurring for the first data input/output mode. The second switching unit switches to electrically connect the second electrode pad and the clock signal line in response to an inverse signal of the control signal occurring for the second data input/output mode.
REFERENCES:
patent: 5502621 (1996-03-01), Schumacher et al.
patent: 5764590 (1998-06-01), Iwamoto et al.
patent: 6681301 (2004-01-01), Mehta et al.
patent: 6818983 (2004-11-01), Shiomi
patent: 7313715 (2007-12-01), Yoo et al.
patent: 2005/0097249 (2005-05-01), Oberlin et al.
patent: 2003-51545 (2003-02-01), None
patent: 10-0355240 (2002-09-01), None
patent: 10-0442870 (2004-07-01), None
Method for Programming MRS Registers in DDR3 SO-DIMMs to Enable CA Bus Mirroring, Sep. 13, 2005, IP.com, pp. 1-4.
Method for Minimizing the Bus Routing Length on a Dual-Sided Circuit Board, Feb. 4, 2004, IP.com, pp. 1-3.
Bae Seung-jun
Kim Jin-gook
Park Kwang-il
Myers Bigel Sibley & Sajovec P.A.
Samsung Electronics Co,. Ltd.
Sorrell Eron J
LandOfFree
Memory devices implementing clock mirroring scheme and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Memory devices implementing clock mirroring scheme and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory devices implementing clock mirroring scheme and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4240054