Memory device having silicided bitlines and method of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S954000

Reexamination Certificate

active

06987048

ABSTRACT:
A memory device and a method of fabrication are provided. The memory device includes a semiconductor substrate, a bottom dielectric, a charge storing layer, and a top dielectric in a stacked gate configuration. Silicided buried bitlines, which function as a source and a drain, are formed within the substrate. The silicided bitlines have a reduced resistance, which greatly reduces the number of bitline contacts necessary in an array of memory devices.

REFERENCES:
patent: 5120571 (1992-06-01), Gill et al.
patent: 6248635 (2001-06-01), Foote et al.
patent: 6300194 (2001-10-01), Locati et al.
patent: 6821847 (2004-11-01), Leung et al.

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