Memory device having a buffer for gating data transmissions

Details Memory device having a buffer for gating data transmissions Memory device having a buffer for gating data transmissions

1991-03-15

1993-12-14

Mottola, Steven

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36523008, G11C 700

Patent

active

052709701

ABSTRACT:
A device has a plurality of memory portions, a first portion having an output enable and input/output connections and a second portion without output enables and having separate input and output connections. A tri-state buffer has its input coupled to the output connection of the second memory portion and its output coupled to the input connection of the second memory portion. A control connection of the buffer is coupled to the output enable of the device.

REFERENCES:
patent: 4602356 (1986-07-01), Nozaki et al.
patent: 4761730 (1988-08-01), Ng et al.
patent: 4951251 (1990-08-01), Yamaguchi et al.
Mitsubishi Electronics, Jul. 1990; VLSI MOS Memory RAM/ROM & Memory Cards.

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