Memory device comprising thin film memory transistors

Details Memory device comprising thin film memory transistors Memory device comprising thin film memory transistors

1991-06-04

1994-01-11

Sikes, William L.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36523006, 365235, G11C 1100, G11C 800

Patent

active

052787907

ABSTRACT:
A latch circuit is provided between a column switch connected to the input/output sides for selecting data lines and a tristate buffer connected to the write side of a memory array, or between the column switch and a sense amplifier connected to the readout side of the memory array. The latch circuit has a capacity corresponding to a plurality of data contents in the tristate buffer or the sense amplifier. While data set in a portion of the latch circuit is being output, the next data can be set in another portion of the latch circuit.

REFERENCES:
patent: 4410965 (1983-10-01), Moore
patent: 4811294 (1989-03-01), Kobayashi et al.
patent: 4899316 (1990-02-01), Nagami
patent: 4953127 (1990-08-01), Nagahashi et al.
patent: 5010522 (1991-04-01), Ashmore, Jr.
patent: 5027326 (1991-06-01), Jones
patent: 5034922 (1991-07-01), Burgess
patent: 5134581 (1992-07-01), Ishibashi et al.

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