Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-01-10
2004-05-25
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S315000, C257S324000
Reexamination Certificate
active
06740925
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor memory device. More particularly, the present invention relates to a semiconductor memory device including a single transistor having functions of random access memory (RAM) and read-only memory (ROM), and methods for operating and manufacturing the same.
2. Description of the Related Art
While RAMs allow fast data access, they are volatile, meaning that they lose their contents when the power is turned off. In contrast, ROMs, which are computer memories on which data has been prerecorded, retain their contents even when the power is turned off. ROM has a data access rate that varies depending on the type of memory, but is much slower than that of RAM. For example, flash memories, which are a variation of electrically erasable programmable read-only memory (EEPROM) that can be written and read by an electrical signal, are similar to ROM in that they retain their contents even when the power is turned off. At the same time, the flash memories have characteristics similar to RAM in that they can be erased and reprogrammed. Flash memories are faster than EEPROM, but they are not as fast as RAM. Also, since flash memories can write data by injecting electric charges through tunneling, their write voltages are high and their write time is long.
To overcome the above problems, nonvolatile RAMs (NVRAMs) have been developed. To get a NVRAM, a dielectric film of a capacitor in 1T-1C dynamic RAM having an array of unit cells, each having a single transistor and a single capacitor, is replaced by a capacitor with a ferroelectric film such as PZT (PbZr
x
Ti
1−x
O
3
), and an electrode is replaced by a heat resistant metal such as platinum (Pt). However, the NVRAM has a problem in that the fabrication process is complicated because a new process recipe is used to pattern a ferroelectric material and a heat resistant metal that are hard to etch. Another problem of NVRAM is that the direction of voltage applied must be changed for data recording and writing, and it is not commercially viable due to high applied voltage. Furthermore, it is more difficult to effectively utilize space than if a flash memory is used since the NVRAM includes capacitors together with transistors.
SUMMARY OF THE INVENTION
To solve above problems, it is a first feature of an embodiment of the present invention to provide a memory device having the advantages of both RAM and ROM, a small size, a simple construction, a low operating voltage and a simple fabrication process due to the use of a current fabrication process.
It is a second feature of an embodiment of the present invention to provide a method for operating the memory device.
It is a third feature of an embodiment of the present invention to provide a method of manufacturing the memory device.
In order to achieve the first feature, the present invention provides a memory device including a single transistor wherein the single transistor is a memory transistor having a gate including a nonvolatile memory element.
The nonvolatile memory element may be formed between a gate insulating layer and a gate conductive layer, both layers constituting the gate, and connected to first and second bit lines separated from each other.
The first and second bit lines may pass below or above the nonvolatile memory element.
The nonvolatile memory element preferably includes semiconductor quantum dots formed on the gate insulating layer and an amorphous material layer covering the plurality of semiconductor quantum dots, wherein the amorphous material layer stores carriers emitted from the semiconductor quantum dots and maintains the carriers in a nonvolatile state until the emitted carriers are recaptured into the semiconductor quantum dots.
The semiconductor quantum dots are preferably silicon dots arranged at regular intervals, and the amorphous material layer, which is an amorphous dielectric layer, is preferably an amorphous silicon nitride layer or an amorphous alumina layer. Also, the amorphous dielectric layer may be replaced with an insulating layer such as a silicon oxide layer (SiO
2
). The first and second bit lines are preferably conductive impurity layers formed from the surface of the substrate to a predetermined depth.
In another embodiment, a memory device includes a substrate, a transistor formed on the substrate, and a nonvolatile memory means formed between the transistor and the substrate. The nonvolatile memory means preferably includes an amorphous material layer formed on the substrate and semiconductor quantum dots formed on the amorphous material layer, wherein the amorphous material layer stores carriers emitted from the semiconductor quantum dots and maintains the carriers in a nonvolatile state until the emitted carriers are recaptured into the semiconductor quantum dots. Preferably, the transistor includes: first and second metal layer patterns formed on the amorphous material layer, both being separated from each other; an insulating layer formed on the amorphous material layer so as to cover the semiconductor quantum dots and the first and second metal layer; and a word line formed on the insulating layer at a position corresponding to a position where the semiconductor quantum dots are formed.
Preferably, the memory device further includes: an interlayer dielectric layer formed on the insulating layer for covering the word line; a via hole formed in the interlayer dielectric layer and the insulating layer so that the first metal pattern is exposed; and a fourth metal layer pattern formed on the interlayer dielectric layer for filling the via hole and passing across the word line.
In order to achieve the second feature of an embodiment of the present invention, the present invention provides a method for operating a memory device including a single transistor formed on a substrate, wherein the single transistor is a memory transistor having a gate with a nonvolatile memory element, and the nonvolatile memory element is connected to a bit line comprised of first and second bit lines passing across the gate. According to the method, an addressing voltage and a write voltage are applied to the gate and the bit line, respectively, to write data to the nonvolatile memory element.
First and second write voltages are preferably applied to the first and second bit lines, respectively, to store data “1” and “0” to the nonvolatile memory element, and the first and second write voltages are the same as or different from each other. The second write voltage is preferably applied to the first bit line to store data “1”, the first write voltage is preferably applied to the second bit line to store data “0”, and the first and second write voltages are the same as or different from each other. A first write voltage may be applied to the second bit line to store data, and a second write voltage higher than the first write voltage may be applied to the second bit line to store different data.
The written data may be read by measuring the conductivity of the nonvolatile memory element. An addressing voltage may be applied to the gate, and then a current measuring means connected to the first bit line to measure current between the gate and the first bit line and thus measure the conductivity of the nonvolatile memory element, whereby data “1” or data “0” is read depending on the measured current.
The present invention also provides a method for operating a memory device including a substrate, a transistor formed on the substrate, the transistor having a gate, a drain connected to a bit line, and a source connected to a source of another transistor, a nonvolatile memory element formed between the gate and the substrate, and a metal line parallel to a word line connected to the transistor. According to the method, data is written by changing the conductivity of the nonvolatile memory element when the metal line is grounded. The nonvolatile memory element may be comprised of a material layer for storing carriers and semiconductor quantum dots formed thereon.
Kim Byong-man
Yoo In-kyeong
Lee & Sterba, P.C.
Pham Hoai
Pham Long
Samsung Electronics Co,. Ltd.
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