Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral adapting
Reexamination Certificate
2006-05-12
2008-10-21
Peyton, Tammara R (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral adapting
C710S008000, C710S009000, C710S010000
Reexamination Certificate
active
07441056
ABSTRACT:
Provided is a memory device for high speed communication including a low speed data communication port and a low speed data input/output circuit, and a data communication system using the memory device. The memory device includes a high speed port interface for transmitting or receiving data to or from a host at a high speed, and a low speed port interface for transmitting or receiving data to or from the host at a low speed.
REFERENCES:
patent: 5889721 (1999-03-01), Gannage
patent: 6052738 (2000-04-01), Muller et al.
patent: 6119196 (2000-09-01), Muller et al.
patent: 6317352 (2001-11-01), Halbert et al.
patent: 6707818 (2004-03-01), Kadambi et al.
patent: WO 2004/008773 (2004-01-01), None
F. Chau & Associates LLC
Peyton Tammara R
Samsung Electronics Co,. Ltd.
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