Memory device and methods for its fabrication

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257SE21179

Reexamination Certificate

active

07432156

ABSTRACT:
A semiconductor memory device and a method for its fabrication are provided. In accordance with one embodiment of the invention the method comprises the steps of forming a gate insulator and a gate electrode overlying a semiconductor substrate. The gate insulator is etched to form an undercut opening beneath an edge of the gate electrode and the undercut opening is filled with a layered structure comprising a charge trapping layer sandwiched between layers of oxide and nitride. A region of the semiconductor substrate is impurity doped to form a bit line aligned with the gate electrode, and a conductive layer is deposited and patterned to form a word line coupled to the gate electrode.

REFERENCES:
patent: 6215702 (2001-04-01), Derhacobian et al.
patent: 6639271 (2003-10-01), Zheng et al.
patent: 6861307 (2005-03-01), Zheng et al.
patent: 6917068 (2005-07-01), Krivokapic
patent: 7189618 (2007-03-01), Lee
patent: 2005/0037577 (2005-02-01), Kim et al.

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