Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2007-01-02
2007-01-02
Toledo, Fernando L. (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S261000, C438S287000, C438S769000, C257SE21680, C257SE27103
Reexamination Certificate
active
10671773
ABSTRACT:
A memory device with an improved passivation structure. The memory device includes a semiconductor substrate with memory units thereon, an interconnect structure over the surface of the semiconductor substrate to connect with the memory units, and a passivation structure over the surface of the interconnect structure. The passivation structure comprises a dielectric layer over the surface of the interconnect structure and a silicon-oxy-nitride (SiOxNy) layer over the surface of the dielectric layer.
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Wolf and Tauber; “Silicon Processing for the VLSI Era vol. 1: Process Technology”; pp. 161 and 168; 1986, Lattice Press; Sunset Beach, CA.
Chiu Hung-Yu
Hsu Fu-Hsiang
Huseh Cheng-Chen
Jeng Pei-Ren
Lu Wen-Pin
Macronix International Co. Ltd.
Toledo Fernando L.
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