Memory device and method for fast cross row data access

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Reexamination Certificate

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C365S230060, C365S230080

Reexamination Certificate

active

07660167

ABSTRACT:
A memory device can provide burst access to row boundary crossing addresses without introducing inter-burst latency. Address locations for a first row of the burst can be accessed at speed, while a prefetch latch can be accessed in lieu of a next row.

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patent: 6477082 (2002-11-01), Pekny et al.
patent: 6510097 (2003-01-01), Fukuyama
patent: 6944087 (2005-09-01), Kanapathippillai et al.

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