Memory device and fabrication thereof

Details Memory device and fabrication thereof Memory device and fabrication thereof

2008-12-16

2010-12-28

Trinh, Michael (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S243000, C438S386000, C257SE21008

Reexamination Certificate

active

07858470

ABSTRACT:
A semiconductor memory device. A trench capacitor disposed at a lower portion of a trench in a substrate, in which the trench capacitor comprises a filling electrode layer and a collar dielectric layer surrounding the filling electrode layer. The top of the collar dielectric layer is lower than top surface level of the filling electrode layer. A vertical transistor is disposed at the upper portion of the trench, comprising a doped region disposed in a portion of the trench adjacent to the trench. A buried conductive layer interposed between the vertical transistor and the trench capacitor, wherein the cross section of the buried conductive layer is H shaped. The trench capacitor and the doping region of vertical transistor are electrically connected through the H shaped buried conductive layer.

REFERENCES:
patent: 6346445 (2002-02-01), Hsu
patent: 6586300 (2003-07-01), Hummler et al.
patent: 6605504 (2003-08-01), JaiPrakash et al.
patent: 6853025 (2005-02-01), Tews et al.
patent: 6936511 (2005-08-01), Divakaruni et al.

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