Memory device and fabrication method thereof

Details Memory device and fabrication method thereof Memory device and fabrication method thereof

2006-05-24

2008-11-11

Toledo, Fernando L (Department: 2895)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S243000, C438S386000, C438S396000, C257S296000, C257S301000

Reexamination Certificate

active

07449382

ABSTRACT:
A memory device is disclosed. A substrate is provided. A plurality of pillars is disposed on the substrate. Each pillar has a plurality of epitaxial layers, has a first sidewall and a second sidewall. A trench is formed between the pillars. A common bottom electrode is disposed in a lower portion of the trench and surrounded by a node dielectric layer. A first insulating layer is disposed on the common bottom electrode inside the trench. A plurality of gate structures is disposed on the first sidewall and inside the trench. A second insulating layer is disposed inside the trench and adjacent to the gate structures. A third insulating layer, body line, and fourth insulating layer are respectively disposed on the substrate and located between the second insulating layer and the second sidewall.

REFERENCES:
patent: 6897508 (2005-05-01), Sneh
patent: 7075134 (2006-07-01), Paz de Araujo et al.

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