Memory device

Details Memory device Memory device

2002-09-11

2004-11-09

Nhu, David (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S381000

Reexamination Certificate

active

06815286

ABSTRACT:

FIELD OF THE INVENTION
This present invention relates to novel memory devices. The invention is useful in the development, manufacture, and use of a variety of devices and/or technologies, including, inter alia, memory devices for electronic computers, associative memory systems, circuit elements with programmable resistance for creating synapses for neuronal nets, direct access data banks, and new types of video/audio equipment.
BACKGROUND OF THE INVENTION
Modern electronic computers employ several different types of memory devices for various purposes and functions requiring different performance/operating characteristics, e.g., read/write and storage/retrieval speeds. The multiplicity of different requirements for the various memory devices substantially complicates the operation of computer systems, increases start-up times, and complicates data storage.
As a consequence of the above-mentioned drawbacks and disadvantages associated with current memory device technology, a high priority task of the microelectronics industry is creation/development of a universal memory device/system having high read/write speeds, high storage density, and long term data retention characteristics.
A number of electronic memory or switching devices have been proposed or developed which include a bi-stable element that can be controllably alternated between high impedance and low impedance states by application of an electrical input, e.g., a voltage equal to or greater than a threshold voltage. Memory and switching devices utilizing such threshold-type behavior have been demonstrated with both organic and inorganic thin film semiconductor materials, including amorphous silicon, chalcogenides such as arsenic trisulphide-silver (As
2
S
3
—Ag), organic materials, and heterostructures such as SrZrO
3
(0.2% Cr)/SrRuO
3
. See, for example: U.S. Pat. Nos. 5,761,115; 5,896,312; 5,914,893; 5,670,818; 5,770,885; and 6,150,705; Russian Patent No. 2,071,126; S. R. Ovshinsky,
Phys. Rev. Lett
., 36, 1469 (1976); J. H. Krieger, et al.,
J. Struct. Chem
., 34, 966 (1993); J. H. Krieger, et al.,
Synthetic Metals
, 122, 199 (2001); R. S. Potember, et al.,
Appl. Phys. Lett
., 34 (6), 405 (1979); Y. Machida, et al.,
Jap. J. Appl. Phys
., Part 1, 28 (2), 297 (1989); A. Beck, et al.,
Appl. Phys. Lett
., 77, 139 (2000); and C. Rossel et al.,
J. Appl. Phys
. (2001), in press.
U.S. Pat. No. 6,055,180 to Gudeson, et al. discloses an electrically addressable, passive storage device for registration, storage, and/or processing of data, comprising a functional medium in the form of a continuous or patterned structure capable of undergoing a physical or chemical change of state. The functional medium comprises individually addressable cells each of which represents a registered or detected value or is assigned a predetermined logical value. Each cell is sandwiched between an anode and cathode (electrode means) which contact the functional medium of the cell for electrical coupling therethrough, with the functional medium having a non-linear impedance characteristic, whereby the cell can be directly supplied with energy for effecting a change in the physical or chemical state in the cell.
A disadvantage/drawback of the storage device of U.S. Pat. No. 6,055,180, however, is that writing of information can occur only once, and reading of the stored information is performed optically, thereby increasing the size and complexity of the device and its use, at the same time reducing reliability of reading of the information due to the difficulty in accurately positioning the optical beam. In addition, an alternate writing method utilizing thermal breakdown caused by application of a high voltage is also disadvantageous in that writing of information can only occur once, and high voltages, hence high electrical fields, are required.
JP 62-260401 discloses a memory cell with a three-layer structure comprised of a pair of electrodes with a high temperature compound (i.e., molecule) sandwiched therebetween, which memory cell operates on a principle relying upon a change of electrical resistance of the compound upon application of an external electric field. Since the conductivity of the compound can be controllably altered between two very different levels, information in bit form can be stored therein.
U.S. Pat. No. 5,761,116 to Kozicki et al. discloses a “programmable metallization cell” comprised of a “fast ion conductor”, such as a film or layer of a chalcogenide doped with a metal ion, e.g., silver or copper, and a pair of electrodes, i.e., an anode (e.g., of silver) and a cathode (e.g., of aluminum), spaced apart at a set distance on the surface of the doped chalcogenide. The silver or copper ions can be caused to move through the chalcogenide film or layer under the influence of an electric field. Thus, when a voltage is applied between the anode and the cathode, a non-volatile metal dendrite (“nano-wire”) grows on the surface of the chalcogenide film or layer (“fast ion conductor”) from the cathode to the anode, significantly reducing the electrical resistance between the anode and cathode. The growth rate of the dendrite is a function of the applied voltage and the interval of its application. Dendrite growth may be terminated by removing the applied voltage and the dendrite may be retracted towards the cathode by reversing the polarity of the applied voltage.
U.S. Pat. No. 5,670,818 to Forouhi et al. discloses a read-only memory device in the form of an electrically programmable antifuse comprised of a layer of amorphous silicon between metal conductors. Under application of a high voltage, a portion of the amorphous silicon layer undergoes a phase change and atoms from the metal conductors migrate into the silicon layer, resulting in formation of a thin conducting filament (“nano-wire”) composed of a complex mixture of silicon and metal.
The principal shortcomings of the above-described memory devices relying upon nano-wire formation are related to the low operational speeds caused by the extended interval required for effecting substantial change in the electrical resistance between the electrodes/conductors and to the high voltage required, e.g., ~60 V. Such drawbacks significantly limit practical use of the cells in current high speed electronic devices.
U.S. Pat. No. 4,652,894 to Potember et al. discloses a current-controlled, bi-stable threshold or memory switch, comprised of a layer of a polycrystalline metal-organic semiconductor material sandwiched between a pair of metallic electrodes, wherein the layer of metal-organic semiconductor material is an electron acceptor for providing fast switching at low voltages between high and low impedance states.
Practical implementation of the threshold memory switch of U.S. Pat. No. 4,652,894 is limited, however, principally due to the use of low temperature metal-organic semiconductor compounds which are not sufficiently mechanically robust, and more importantly, are insufficiently resistant to chemical degradation when subjected to the elevated temperatures commonly associated with modern semiconductor manufacturing processing, i.e., greater than about 150° C. and as high as about 400° C. In addition, the physical characteristics of the metal-organic semiconductor materials cause poor repeatability of the read/write/erase cycle, and storage is limited to only 1 bit of formation, thereby prohibiting use in high information density applications/devices.
In view of the above, there exists a clear need for memory devices which are free of the above-described shortcomings, drawbacks, and disadvantages associated with memory devices of the conventional art. The present invention, therefore, has as its principal aim the development of a universal memory device/system for high speed data storage and retrieval, with capability of long term storage at high bit densities.
DISCLOSURE OF THE INVENTION
An advantage of the present invention is an improved memory storage and retrieval device.
Another advantage of the present invention is an improved memory storage and retrieval devic

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