Memory device

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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Details

C365S154000, C365S205000

Reexamination Certificate

active

07339845

ABSTRACT:
A memory device an array of memory cells, the array including word lines and bit lines. The memory device also includes managing logic for managing array reading operations that are carried out by executing a step of precharging the bit lines and a step of turning on the word lines. The managing logic includes a control block for generating a first enable signal of the precharge step and a second enable signal of the turning on step such that, within the same reading operation, the precharge and turning on steps are partially concurrent.

REFERENCES:
patent: 5689468 (1997-11-01), Ihara

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