Memory circuit and related method for integrating...

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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C365S230020

Reexamination Certificate

active

11277044

ABSTRACT:
In a memory circuit, memory cells are arranged in a matrix by “row line-and column line” (may also denoted as “word line and bit line”). The invention provides a memory circuit and related method capable for independently pre-charging the column lines or bit lines selectively during data accessing according to results of column pre-decoding to decrease the pre-charging power consumption. After pre-charging, the objective memory cell is enabled to change or not to change the corresponding electric level of the connected column line according to the stored data, and a sense amplifier detects the stored data by measuring the electric level of the column line.

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patent: 1220528 (2004-08-01), None

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